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IC61C256AH Document Title 32K x 8 High Speed SRAM Revision History Revision No 0A 0B 0C 0D History Initial Draft Revise typo of tHA on page 7 Add SOP package type Revise typo of sop size at page 2,9 Draft Date March 23,2001 October 18,2001 February 18,2002 April 19,2002 Remark The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices. Integrated Circuit Solution Inc. AHSR010-0D 4/19/2002 1 IC61C256AH 32K x 8 HIGH-SPEED CMOS STATIC RAM FEATURES * High-speed access times: 10, 12, 15, 20, 25 ns * Low active power: 400 mW (typical) * Low standby power -- 250 W (typical) CMOS standby -- 55 mW (typical) TTL standby * Fully static operation: no clock or refresh required * TTL compatible interface and outputs * Single 5V power supply DESCRIPTION The ICSI IC61C256AH is very high-speed, low power, 32,768 word by 8-bit static RAMs. They are fabricated using ICSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8 ns maximum. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation is reduced to 50 W (typical) with CMOS input levels. Easy memory expansion is provided by using an active LOW Chip Enable (CE). The active LOW Write Enable (WE) controls both writing and reading of the memory. The IC61C256AH is pin compatible with other 32k x 8 SRAMs and are available in 28-pin 300mil PDIP, 300mil SOJ, and 8*13.4mm TSOP-1 package, 330 mil SOP. FUNCTIONAL BLOCK DIAGRAM A0-A14 DECODER 32K X 8 MEMORY ARRAY VCC GND I/O DATA CIRCUIT I/O0-I/O7 COLUMN I/O CE OE WE CONTROL CIRCUIT ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. (c) Copyright 2000, Integrated Circuit Solution Inc. 2 Integrated Circuit Solution Inc. AHSR010-0D 4/19/2002 IC61C256AH PIN CONFIGURATION 28-Pin DIP and SOJ and SOP A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 PIN CONFIGURATION 8x13.4mm TSOP-1 OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3 22 23 24 25 26 27 28 1 2 3 4 5 6 7 21 20 19 18 17 16 15 14 13 12 11 10 9 8 A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2 PIN DESCRIPTIONS A0-A14 CE OE WE I/O0-I/O7 Vcc GND Address Inputs Chip Enable Input Output Enable Input Write Enable Input Input/Output Power Ground TRUTH TABLE Mode Not Selected (Power-down) Output Disabled Read Write WE X H H L CE H L L L OE X H L X I/O Operation High-Z High-Z DOUT DIN Vcc Current ISB1, ISB2 ICC1,ICC2 ICC1, ICC2 ICC1, ICC2 ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM TBIAS TSTG PD IOUT Parameter Terminal Voltage with Respect to GND Temperature Under Bias Storage Temperature Power Dissipation DC Output Current (LOW) Value -0.5 to +7.0 -55 to +125 -65 to +150 1.5 20 Unit V C C W mA Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Integrated Circuit Solution Inc. AHSR010-0D 4/19/2002 3 IC61C256AH OPERATING RANGE Range Commercial Industrial Notes: 1. 8 ns is preliminary. Ambient Temperature 0C to +70C -40C to +85C Speed -10, -12 -15, -20 -12 -15, -20, -25 VCC 5V, 5% 5V 10% 5V 5% 5V 10% DC ELECTRICAL CHARACTERISTICS (Over Operating Range) Symbol VOH VOL VIH VIL ILI ILO Parameter Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input Leakage Output Leakage (1) Test Conditions VCC = Min., IOH = -4.0 mA VCC = Min., IOL = 8.0 mA Min. 2.4 -- 2.2 -0.5 Max. -- 0.4 VCC + 0.5 0.8 5 10 5 10 Unit V V V V A A Input LOW Voltage(2) GND VIN VCC GND VOUT VCC, Outputs Disabled Com. Ind. Com. Ind. -5 -10 -5 -10 Notes: 1. VIH=VCC +3.0V for pulse width less than 10ns. 2. VIL = -3.0V for pulse width less than 10 ns. POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) -10 Sym. Parameter ICC ISB1 Vcc Dynamic Operating Supply Current TTL Standby Current (TTL Inputs) CMOS Standby Current (CMOS Inputs) Test Conditions VCC = Max., CE = VIL IOUT = 0 mA, f = fMAX VCC = Max., VIN = VIH or VIL CE VIH, f = 0 VCC = Max., CE VCC - 0.2V, VIN VCC - 0.2V, or VIN 0.2V, f = 0 Com. Ind. Com. Ind. Com. Ind. Min. Max. -12 Min. Max. -15 Min. Max. -20 Min. Max. -25 Min. Max. Unit -- 145 -- 180 -- 25 -- 30 --2 -- 10 -- 135 -- 170 -- 25 -- 30 --2 -- 10 -- 125 -- 160 -- 25 -- 30 --2 -- 10 -- 120 -- 150 -- 25 -- 30 --2 -- 10 -- 120 -- 140 -- 25 -- 30 --2 -- 10 mA mA ISB2 mA Notes: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. CAPACITANCE(1,2) Symbol CIN COUT Parameter Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Max. 8 10 Unit pF pF Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions: TA = 25C, f = 1 MHz, Vcc = 5V. 4 Integrated Circuit Solution Inc. AHSR010-0D 4/19/2002 IC61C256AH READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) -10 Symbol Parameter Min. Max. Min. -12 Max. Min. -15 Max. Min. -20 Max. Min. -25 Max. Unit tRC tOHA tACE tDOE Read Cycle Time Output Hold Time CE Access Time OE Access Time 10 -- 2 -- -- 0 -- 2 -- 0 -- -- 10 -- 10 5 -- 5 -- 5 -- 10 12 -- 2 -- -- 0 -- 3 -- 0 -- -- 12 -- 12 5 -- 6 -- 7 -- 12 15 -- 2 -- -- 0 -- 3 -- 0 -- -- 15 -- 15 7 -- 7 -- 8 -- 15 20 -- 2 -- -- 0 -- 3 -- 0 -- -- 20 -- 20 8 -- 9 -- 9 -- 18 25 -- 2 -- -- 0 -- 3 -- 0 -- -- 25 -- 25 9 -- 10 -- 10 -- 20 ns ns ns ns ns ns ns ns ns ns ns tAA Address Access Time tLZOE(2)OE to Low-Z Output tHZOE(2)OE to High-Z Output tLZCE CE to Low-Z Output (2) tHZCE CE to High-Z Output (2) tPU(3) CE to Power-Up tPD(3) CE to Power-Down Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured 200 mV from steady-state voltage. Not 100% tested. 3. Not 100% tested. AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Levels Output Load Unit 0V to 3.0V 3 ns 1.5V See Figures 1 and 2 AC TEST LOADS 480 5V 5V 480 OUTPUT 30 pF Including jig and scope 255 OUTPUT 5 pF Including jig and scope 255 Figure 1. Integrated Circuit Solution Inc. AHSR010-0D 4/19/2002 Figure 2. 5 IC61C256AH AC WAVEFORMS READ CYCLE NO. 1(1,2) t RC ADDRESS t AA t OHA DOUT PREVIOUS DATA VALID t OHA DATA VALID READ CYCLE NO. 2(1,3) t RC ADDRESS t AA OE t OHA t DOE CE t HZOE t LZOE t ACE t LZCE t HZCE DATA VALID DOUT HIGH-Z Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE = VIL. 3. Address is valid prior to or coincident with CE LOW transitions. 6 Integrated Circuit Solution Inc. AHSR010-0D 4/19/2002 IC61C256AH WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range) -10 Symbol Parameter Write Cycle Time CE to Write End Address Setup Time to Write End Address Hold from Write End Address Setup Time (4) -12 Min. Max. -15 Min. Max. -20 Min. Max. -25 Min. Max. Unit Min. Max. tWC tSCE tAW tHA tSA tPWE tSD tHD tLZWE 10 9 9 0 0 8 7 0 -- 0 -- -- -- -- -- -- -- -- 6 -- 12 10 10 0 0 8 7 0 -- 0 -- -- -- -- -- -- -- -- 6 -- 15 10 12 0 0 10 9 0 -- 0 -- -- -- -- -- -- -- -- 7 -- 20 13 15 0 0 13 10 0 -- 0 -- -- -- -- -- -- -- -- 8 -- 25 15 20 0 0 15 12 0 -- 0 -- -- -- -- -- -- -- -- 10 -- ns ns ns ns ns ns ns ns ns ns WE Pulse Width Data Setup to Write End Data Hold from Write End WE HIGH to Low-Z Output tHZWE(2) WE LOW to High-Z Output Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1a. 2. Tested with the load in Figure 1b. Transition is measured 500 mV from steady-state voltage. Not 100% tested. 3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 4. Tested with OE HIGH. AC WAVEFORMS WRITE CYCLE NO. 1 (WE Controlled) (1,2 ) t WC ADDRESS VALID ADDRESS t SA CE t SCE t HA WE t AW t PWE1 t PWE2 t HZWE t LZWE HIGH-Z DOUT DATA UNDEFINED t SD DIN t HD DATAIN VALID Integrated Circuit Solution Inc. AHSR010-0D 4/19/2002 7 IC61C256AH WRITE CYCLE NO. 2 (CE Controlled) (1,2) t WC ADDRESS VALID ADDRESS t HA OE CE LOW t AW t PWE1 WE t SA DOUT DATA UNDEFINED t HZWE HIGH-Z t LZWE t SD DIN t HD DATAIN VALID Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 2. I/O will assume the High-Z state if OE VIH. 8 Integrated Circuit Solution Inc. AHSR010-0D 4/19/2002 IC61C256AH ORDERING INFORMATION: IC61C256AH Commercial Range: 0C to +70C Speed (ns) 10 10 10 10 12 12 12 12 15 15 15 15 20 20 20 20 Order Part No. IC61C256AH-10N IC61C256AH-10J IC61C256AH-10T IC61C256AH-10U IC61C256AH-12N IC61C256AH-12J IC61C256AH-12T IC61C256AH-12U IC61C256AH-15N IC61C256AH-15J IC61C256AH-15T IC61C256AH-15U IC61C256AH-20N IC61C256AH-20J IC61C256AH-20T IC61C256AH-20U Package 300mil DIP 300mil SOJ 8*13.4mm TSOP-1 330mil SOP 300mil DIP 300mil SOJ 8*13.4mm TSOP-1 330mil SOP 300mil DIP 300mil SOJ 8*13.4mm TSOP-1 330mil SOP 300mil DIP 300mil SOJ 8*13.4mm TSOP-1 330mil SOP ORDERING INFORMATION: IC61C256AH Industrial Range: -40C to +85C Speed (ns) 12 12 12 12 15 15 15 15 20 20 20 20 25 25 25 25 Order Part No. IC61C256AH-12NI IC61C256AH-12JI IC61C256AH-12TI IC61C256AH-12UI IC61C256AH-15NI IC61C256AH-15JI IC61C256AH-15TI IC61C256AH-15UI IC61C256AH-20NI IC61C256AH-20JI IC61C256AH-20TI IC61C256AH-20UI IC61C256AH-25NI IC61C256AH-25JI IC61C256AH-25TI IC61C256AH-25UI Package 300mil DIP 300mil SOJ 8*13.4mm TSOP-1 330mil SOP 300mil DIP 300mil SOJ 8*13.4mm TSOP-1 330mil SOP 300mil DIP 300mil SOJ 8*13.4mm TSOP-1 330mil SOP 300mil DIP 300mil SOJ 8*13.4mm TSOP-1 330mil SOP Integrated Circuit Solution Inc. HEADQUARTER: NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU, TAIWAN, R.O.C. TEL: 886-3-5780333 Fax: 886-3-5783000 BRANCH OFFICE: 7F, NO. 106, SEC. 1, HSIN-TAI 5TH ROAD, HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C. TEL: 886-2-26962140 FAX: 886-2-26962252 http://www.icsi.com.tw Integrated Circuit Solution Inc. AHSR010-0D 4/19/2002 9 |
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